Senior Layout Engineer

Job summary

Our client - a reputable semiconductor corporation is looking for qualified candidates for Senior Layout Engineer role

Job Responsibilities

• Creation of full custom layout of high-voltage / mixed-signal sub blocks in CMOS or BICMOS technologies together with experts from the team
• Floor planning, placement and routing of hierarchical analog blocks based on schematics while following technology guidelines (Design Rule Checks) and other requirements (shielding, spacing, matching)
• Consideration of performance and quality aspects (e.g., area, power, RF requirements, ESD)
• Performing minor adaptations of schematics, parasitic extraction and layout verification (Layout vs. Schematics, Design Rule Checks)
• Working independently according to project schedule while interfacing to circuit and package designers contributing to a high quality of the final product
• Scripting of software driven layout generation tool.

Experience requirements

• 3-5 years of working experience
• Language and software skills + level: Cadence Virtuoso, Unix
• Enjoys developing expertise and skills,
• Accepts responsibility for common goals and puts the team's results above his/her own interests
• Promotes an awareness for quality in his/her area of work
• Remains focused on solutions, open, and flexible even when under pressure

Education requirements

 

Please click the APPLY button or contact Ms. Phuong Nguyen at +84 975 625 919 or thuphuong.nguyen@adecco.com to discuss further.

Contact Person

•   Phuong Nguyen
•  Adecco