Physical Design Engineer

Job summary

Adecco's client, a well respect international semiconductor company, is looking for Vietnamese talents to fill in Physical Design Engineer for its dynamic headquarter office overseas.

Job Responsibilities

The principal responsibility of the candidate is to perform complete netlist to GDS physical design steps which include floor plan, APR, timing closure, IR/EM analysis, layout verification, formal verification, and other tape out related tasks. Candidate will work in a talented team to design advanced chips using cutting-edge process nodes while meeting high standard design requirements.

Experience requirements

• Expertise in Cadence Innovus and/or Synopsys ICC2
• Experience in block level place and route implementation with multi-voltage & multi-corner designs
• In-depth understanding of place and route flow
• Knowledge of lower power design
• Experience in advanced technology nodes is a plus
• Timing closure and power analysis skills
• Hands on experiences in layout verification and DRC fixes
• Good coding skills in TCL
• Good interpersonal and communication skills
• Self-motivated and excellent team spirit

Education requirements

• Bachelor or Master degree in EE or CE with 3+ years of relevant working experience in physical design engineer.

If you are ready to join this exciting opportunity, please contact our Recruitment Manager, Ms. Van Anh Nguyen at +84 83 246 6688 (Call/iMess/Whatsapp/Zalo) or via email at vananh.nguyen@adecco.com for instant support.

Contact Person

•   Van Anh Nguyen
•  Adecco